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Description: This free cpu-ip! use verilog
Platform: |
Size: 3341312 |
Author: 王军 |
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Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction.
The code has contain combination circuit and sequenial circuit.
CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
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Size: 8192 |
Author: 張大小 |
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Description: 一个8位CISC结构的精简CPU,2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
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Size: 94208 |
Author: 陈旭 |
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Description: 一个嵌入式RISC CPU 的Verilog 设计源码,可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
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Size: 128000 |
Author: 箫勇天 |
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Description: 用verilog写的很好的cpu core-using Verilog write a good cpu core
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Size: 52224 |
Author: 刘烨波 |
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Description: 一个很好的利用verilog编程实现的cpu程序,一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.
Platform: |
Size: 6144 |
Author: 刘永 |
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Description: pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
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Size: 24576 |
Author: 詹伟业 |
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Description: 简单的一个8位RISC,Verilog HDL代码,类型为pic16c57-a simple eight RISC, Verilog HDL code, the type of pic16c57
Platform: |
Size: 80896 |
Author: 陈正一 |
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Description: hrisc cpu,为何只有vhdl选择呢?大家都用verilog的啊-hrisc cpu why only VHDL choice? We all use the Verilog ah
Platform: |
Size: 128000 |
Author: 12 |
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Description: 卡内基梅陇大学verilog课程讲义,希望大家能够喜欢!-Verilog University of Paisley and Adams Carnegie Course Training Manual, we hope to love!
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Size: 234496 |
Author: 张新 |
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Description: 这个是用VERILOG做的一个8位功能很弱的CPU-this is a done VERILOG eight functional weak CPU
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Size: 16384 |
Author: 贾振华 |
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Description: 一个非常简单的cpu设计的原代码,是用verilog编写的-a very simple cpu design of the original code, was prepared by the Verilog
Platform: |
Size: 730112 |
Author: wanglei |
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Description: Verilog HDL编写的CPU模型,很经典,比较通用-Verilog HDL prepared by the CPU model, classic, more generic
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Size: 1024 |
Author: wyl |
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Description: 经典计算机体系结构RISC8的源代码(Verilog),包括CPU、内存、寄存器等的实现-classic computer architecture RISC8 the source code (Verilog), including CPU, memory, such as the realization Register
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Size: 82944 |
Author: snake |
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Description: 8051单片机是一种应用最广泛的单片机.它的内核设计非常精简,这是用Verilog硬件描述语言写的8051单片机内核-8051 is a most widely used SCM. Its kernel design has been streamlined, This is used Verilog hardware description language to write the 8051 microcontroller core
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Size: 52224 |
Author: 王二 |
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Description: 一个32位微处理器的verilog实现源代脉,采用5级流水线和cache技术.-a 32 Microprocessor verilog achieve pulse generation sources, used five lines and cache technology.
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Size: 152576 |
Author: 大为 |
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Description: 初学cpu结构的很好的verilog代码的示例,适合初学者-novice cpu structure of the good verilog code examples for beginners
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Size: 79872 |
Author: mapleni |
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Description: 这个是用可编程器件进行仿真CPU的程序,大家一起分享拉-this device is programmable CPU simulation procedures to share with everyone Rafah
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Size: 18432 |
Author: 982134 |
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Description: 一个小单片机的verilog源代码, 包含说明文档-a small SCM verilog source code contains documentation
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Size: 16384 |
Author: Charles Wen |
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Description: verilog编写的一个简单的I2C控制器,言简意赅,完成对寄存器的配置.用户可自行修改配置参数.
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Size: 3072 |
Author: 康丹丹 |
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